METALLIC SOURCE/DRAIN ARCHITECTURE FOR ADVANCED MOS TECHNOLOGY

Entidades participantes: CNRS (Francia), Universidad de Salamanca (España), Université Catholique de Louvain (Bélgica), I.T.E. (Polonia), ST Microelectronics, Philips Semiconductors

Resumen: Among the main difficulties to overcome toward the 10 nm gate length MOSFET, many challenges are associated to the source/drain (S/D) regions. The tight constraints of dopant activation to achieve very highly doped junctions, extremely steep lateral profiling, low contact specific resistance have motivated a renewed interest in MOSFETs architectures that integrate metallic Schottky S/D. Based on that background, the METAMOS project proposes the design, optimisation, fabrication and characterization of metallic Schottky-Barrier-like MOSFETs to solve critical problems associated to the source/drain architecture and more specifically due to the specific contact resistance at the metal (or silicide) to silicon interface. The first major objective is to develop and fully characterize advanced very low Schottky barriers (<0.1 eV) primarily based on (but not limited to) silicides of platinum and iridium for p-type contacts and rare earth silicides (erbium, ytterbium) for n-type contacts. The second objective is to demonstrate the complete integration of metallic source/drain (S/D) in a complementary MOS technology at academic level as a test bed to operate the appropriate selection of contact materials and process flow for industrial exploitation. The third objective concentrates on the implementation of metallic S/D into bulk and SOI CMOS process cores to demonstrate the transfer from a laboratory concept to an industrially viable solution. Finally, the fourth general objective is to get a definitive answer on the ability of metallic S/D MOSFETs and of non-overlap architectures to outmatch the conventional one, based on device demonstration, wideband measurements, physical modelling and comparison with CMOS state-of-the-art and ITRS requirements. To reach this goal, the project is organized in 4 technical workpackages covering:

• material engineering,
• process integration,
• device simulation and modelling and
• material and device characterization

Título del proyecto: Dispositivos MOSFET de Silicio no convencionales: Investigación Monte Carlo de los mecanismos de transporte de carga en transistores ultra-escalados para aplicaciones de alta frecuencia (SA010A07), financiado por la Consejería de Educación de la Junta de Castilla y León

Entidades participantes: Universidad de Salamanca (España)

Resumen:El objetivo del presente proyecto es el perfeccionamiento y utilización de simuladores Monte Carlo de dispositivos para afrontar el estudio de transistores MOSFET avanzados de Silicio de máximo interés hoy en día para la industria semiconductora, y en particular algunos de los dispositivos identificados por el ITRS como las soluciones más prometedoras a los problemas observados en las estructuras MOSFET convencionales.

 http://web.usal.es/~raulr/investigacion.html

By Edgar Alberto Servita 18.856.338

CAF